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edge_masked_load
def edge_masked_load[dtype: DType, src_space: AddressSpace, //, width: Int](ptr: UnsafePointer[Scalar[dtype], address_space=src_space], mask: Int16) -> SIMD[dtype, width]
Loads a predicated (edge-masked) vector in the pointer's own address space (Apple M5 only).
Loads width elements from ptr, zeroing any lane whose mask bit is
clear; masked-off lanes are not read, so the vector may safely straddle the
end of a buffer. For a generic-typed pointer use gmem_edge_masked_load /
smem_edge_masked_load. Emits the AGX3 load.with.emask instruction; build
mask with build_edge_mask.
Constraints:
width in {1, 2, 4}, dtype 8/16/32/64-bit, src_space GLOBAL or
SHARED. Apple M5 only.
Parameters:
- dtype (
DType): Element type of the pointer (inferred). - src_space (
AddressSpace): Pointer address space (inferred). - width (
Int): Number of elements to load.
Args:
- ptr (
UnsafePointer[Scalar[dtype], address_space=src_space]): Base pointer of the load. - mask (
Int16): Per-lane active mask, e.g. frombuild_edge_mask.
Returns:
SIMD[dtype, width]: A SIMD[dtype, width]; in-range lanes loaded, masked-off lanes zero.