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copy_sram_to_dram
def copy_sram_to_dram[thread_layout: Layout[thread_layout.shape_types, thread_layout.stride_types], *, swizzle: Optional[Swizzle] = None, num_threads: Int = thread_layout.size(), element_size: Int](dst: TileTensor[Storage=dst.Storage, linear_idx_type=dst.linear_idx_type, element_size=element_size], src: TileTensor[Storage=src.Storage, address_space=AddressSpace.SHARED, linear_idx_type=src.linear_idx_type, element_size=element_size])
Synchronously copies a tile from SRAM (shared memory) to DRAM (generic).
Delegates to SharedToGenericTileCopier. The binary_op fusion and
fp32 -> half-precision downcast paths of the legacy free function are not
supported here.
Parameters:
- thread_layout (
Layout[thread_layout.shape_types, thread_layout.stride_types]): Layout describing how threads are organized over the copy. - swizzle (
Optional[Swizzle]): Swizzle the shared-memory tile was populated with; must match the swizzle used when the tile was written. - num_threads (
Int): Total number of threads in the thread block. Threads beyondthread_layout.size()do not participate. - element_size (
Int): Number of scalar elements per logical element; inferred from the source and destination tiles.
Args:
- dst (
TileTensor[Storage=dst.Storage, linear_idx_type=dst.linear_idx_type, element_size=element_size]): Destination tile in generic memory. - src (
TileTensor[Storage=src.Storage, address_space=AddressSpace.SHARED, linear_idx_type=src.linear_idx_type, element_size=element_size]): Source tile in shared memory.